http://embeddedgurus.com/stack-overflow/2009/07/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/ Thoughts on embedded systems by Nigel Jones Fri, 10 Feb 2012 14:37:44 +0000 hourly 1 http://wordpress.org/?v=3.2.1 http://embeddedgurus.com/stack-overflow/2009/07/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/comment-page-1/#comment-253 Anonymous Fri, 24 Jul 2009 09:32:42 +0000 http://www.gfcdev.org/test-stack/2009/07/17/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/#comment-253 Thanks!! Thanks!!

]]> http://embeddedgurus.com/stack-overflow/2009/07/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/comment-page-1/#comment-252 Nigel Jones Thu, 23 Jul 2009 10:55:04 +0000 http://www.gfcdev.org/test-stack/2009/07/17/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/#comment-252 In general - no. Most SPI hardware uses the standard CMOS structure, such that there is no preferential state (low, high) for minimizing power. Instead the power is consumed mostly during transitions. Having said that, I have seen SPI implementations that effectively use an open-drain architecture in order to perform voltage level translation (used when the processor and the peripheral are running at different voltages). If this describes your hardware then these technique would probably work well for you. In general – no. Most SPI hardware uses the standard CMOS structure, such that there is no preferential state (low, high) for minimizing power. Instead the power is consumed mostly during transitions. Having said that, I have seen SPI implementations that effectively use an open-drain architecture in order to perform voltage level translation (used when the processor and the peripheral are running at different voltages). If this describes your hardware then these technique would probably work well for you.

]]> http://embeddedgurus.com/stack-overflow/2009/07/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/comment-page-1/#comment-251 Anonymous Thu, 23 Jul 2009 10:41:03 +0000 http://www.gfcdev.org/test-stack/2009/07/17/lowering-power-consumption-tip-1-avoid-zeros-on-the-i2c-bus/#comment-251 Does this work for SPI too? Does this work for SPI too?

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