http://embeddedgurus.com/embedded-bridge/2010/03/early-hardwarefirmware-collaboration/ A Blog by Gary Stringham Wed, 15 Jun 2011 13:23:15 +0000 hourly 1 http://wordpress.org/?v=3.3.1 http://embeddedgurus.com/embedded-bridge/2010/03/early-hardwarefirmware-collaboration/comment-page-1/#comment-6 Hardware vs. firmware naming conventions « Stack Overflow Sun, 28 Mar 2010 16:01:39 +0000 http://embeddedgurus.com/embedded-bridge/?p=19#comment-6 [...] to what Gary has to say in the coming months. Anyway, I’d recently read his posting on Early hardware / firmware collaboration when I found myself looking at a fairly complex schematic. The microprocessor had a lot of IO pins, [...] [...] to what Gary has to say in the coming months. Anyway, I’d recently read his posting on Early hardware / firmware collaboration when I found myself looking at a fairly complex schematic. The microprocessor had a lot of IO pins, [...]

]]> http://embeddedgurus.com/embedded-bridge/2010/03/early-hardwarefirmware-collaboration/comment-page-1/#comment-2 Nigel Jones Mon, 15 Mar 2010 19:44:28 +0000 http://embeddedgurus.com/embedded-bridge/?p=19#comment-2 An interesting post Gary. I have distinct memories of being invited to a design review of an ASIC when I was only a few months out of university. The ASIC had a status register which contained only 3 valid bits - and so the designer had done the natural thing and allocated the bits to bit positions 0, 1 & 2. However, the design would require the firmware to read one bit of this register frequently and so I asked if the bit could be allocated to bit position 7 - such that the firmware could use a 'branch if negative' instruction rather than having to do a mask and compare. While saving a a couple of instructions sounds crazy today, that was in the days when 2K of EPROM is all you got. An interesting post Gary. I have distinct memories of being invited to a design review of an ASIC when I was only a few months out of university. The ASIC had a status register which contained only 3 valid bits – and so the designer had done the natural thing and allocated the bits to bit positions 0, 1 & 2. However, the design would require the firmware to read one bit of this register frequently and so I asked if the bit could be allocated to bit position 7 – such that the firmware could use a ‘branch if negative’ instruction rather than having to do a mask and compare. While saving a a couple of instructions sounds crazy today, that was in the days when 2K of EPROM is all you got.

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